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Buffers and Line Drivers 54F240/BRA
NXP
54F240/BRA
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Standard and Specialty Logic
Buffers and Line Drivers
Specification
| Product Attribute | Attribute Value |
| HTS | 8542330001 |
| PPAP | No |
| EU RoHS | Supplier Unconfirmed |
| Bus Hold | No |
| Mounting | Through Hole |
| Polarity | Inverting |
| ECCN (US) | EAR99 |
| Pin Count | 20 |
| Automotive | No |
| Lead Shape | Through Hole |
| Output Type | 3-State |
| PCB changed | 20 |
| Part Status | Unconfirmed |
| Logic Family | F |
| Package Width | 7.87(Max) |
| Logic Function | Buffer/Line Driver |
| Package Height | 3.3(Max) |
| Package Length | 26.92(Max) |
| Supplier Package | CDIP |
| Input Signal Type | Single-Ended |
| Process Technology | Bipolar |
| Standard Package Name | DIP |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Supplier Temperature Grade | Military |
| Number of Channels per Chip | 8 |
| Number of Elements per Chip | 2 |
| Number of Input Enables per Chip | 0 |
| Number of Output Enables per Chip | 2 Low |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Absolute Propagation Delay Time (ns) | 10.5 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Low Level Output Current (mA) | 48 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -12 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 9@4.5V to 5.5V |
| Description |
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