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74AUP1G240GW,125
74AUP1G240GW,125
Buffers and Line Drivers 74AUP1G240GW,125
Nexperia
74AUP1G240GW,125
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Standard and Specialty Logic
Buffers and Line Drivers
Specification
Product AttributeAttribute Value
HTS8542.39.00.01
PPAPUnknown
SVHCYes
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count5
AutomotiveUnknown
Output Type3-State
PCB changed5
Part StatusActive
Logic FamilyAUP
Package Width1.35(Max)
Logic FunctionBuffer/Line Driver
Package Height1(Max)
Package Length2.2(Max)
Supplier PackageTSSOP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Inputs per Chip1
Number of Outputs per Chip1
Number of Channels per Chip1
Number of Elements per Chip1
Maximum Power Dissipation (mW)250
Maximum Quiescent Current (uA)0.5
Number of Input Enables per Chip0
Number of Output Enables per Chip1 Low
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)29.5
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)0.8
Typical Operating Supply Voltage (V)1.8|2.5|3.3
Maximum Low Level Output Current (mA)4
Propagation Delay Test Condition (pF)30
Maximum High Level Output Current (mA)-4
Maximum Propagation Delay Time @ Maximum CL (ns)21.6@1.1V to 1.3V|12.3@1.4V to 1.6V|9.5@1.65V to 1.95V|7.1@2.3V to 2.7V|6.4@3V to 3.6V
Description
Buffer/Line Driver 1-CH Inverting 3-ST CMOS Automotive 5-Pin TSSOP T/R
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