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Buffers and Line Drivers 74LV125N,112
NXP
74LV125N,112
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Standard and Specialty Logic
Buffers and Line Drivers
Specification
| Product Attribute | Attribute Value |
| PPAP | Unknown |
| EU RoHS | Supplier Unconfirmed |
| Bus Hold | No |
| Mounting | Through Hole |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Bulk |
| Pin Count | 14 |
| Automotive | Unknown |
| Output Type | 3-State |
| PCB changed | 14 |
| Part Status | Obsolete |
| Logic Family | LV |
| Package Width | 6.48(Max) |
| Logic Function | Buffer/Line Driver |
| Package Height | 3.2(Max) |
| Package Length | 19.5(Max) |
| Supplier Package | PDIP |
| Input Signal Type | Single-Ended |
| Process Technology | CMOS |
| Number of Inputs per Chip | 4 |
| Number of Outputs per Chip | 4 |
| Number of Channels per Chip | 4 |
| Number of Elements per Chip | 4 |
| Maximum Power Dissipation (mW) | 750 |
| Maximum Quiescent Current (uA) | 160 |
| Number of Input Enables per Chip | 0 |
| Number of Output Enables per Chip | 4 Low |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 39 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 1 |
| Typical Operating Supply Voltage (V) | 3.3 |
| Maximum Low Level Output Current (mA) | 16 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -16 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 55(Typ)@1.2V|19(Typ)@2V|14(Typ)@2.7V|10(Typ)@3.3V |
| Description |
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