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Buffers and Line Drivers 74LV367PW,118
NXP
74LV367PW,118
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Standard and Specialty Logic
Buffers and Line Drivers
Specification
| Product Attribute | Attribute Value |
| PPAP | Unknown |
| EU RoHS | Supplier Unconfirmed |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 16 |
| Automotive | Unknown |
| Output Type | 3-State |
| PCB changed | 16 |
| Part Status | Obsolete |
| Logic Family | LV |
| Package Width | 4.5(Max) |
| Logic Function | Buffer/Line Driver |
| Package Height | 0.95(Max) |
| Package Length | 5.1(Max) |
| Supplier Package | TSSOP |
| Input Signal Type | Single-Ended |
| Process Technology | CMOS |
| Standard Package Name | SOP |
| Number of Inputs per Chip | 6 |
| Number of Outputs per Chip | 6 |
| Number of Channels per Chip | 6 |
| Number of Elements per Chip | 2 |
| Maximum Power Dissipation (mW) | 400 |
| Maximum Quiescent Current (uA) | 160 |
| Number of Input Enables per Chip | 0 |
| Number of Output Enables per Chip | 2 Low |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 70 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 1 |
| Typical Operating Supply Voltage (V) | 3.3 |
| Maximum Low Level Output Current (mA) | 8 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -8 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 50(Typ)@1.2V|17(Typ)@2V|13(Typ)@2.7V|10(Typ)@3.3V |
| Description |
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