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Buffers and Line Drivers HEF40240BT,652
NXP
HEF40240BT,652
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Standard and Specialty Logic
Buffers and Line Drivers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Supplier Unconfirmed |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Inverting |
| ECCN (US) | EAR99 |
| Packaging | Bulk |
| Pin Count | 20 |
| Automotive | No |
| Output Type | 3-State |
| PCB changed | 20 |
| Part Status | Obsolete |
| Logic Family | HEF4000 |
| Package Width | 7.6(Max) |
| Logic Function | Buffer/Line Driver |
| Package Height | 2.45(Max) |
| Package Length | 13(Max) |
| Supplier Package | SO |
| Input Signal Type | Single-Ended |
| Process Technology | CMOS |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Supplier Temperature Grade | Industrial |
| Number of Channels per Chip | 8 |
| Number of Elements per Chip | 2 |
| Maximum Power Dissipation (mW) | 500 |
| Maximum Quiescent Current (uA) | 16 |
| Number of Input Enables per Chip | 0 |
| Number of Output Enables per Chip | 2 Low |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 190 |
| Maximum Operating Supply Voltage (V) | 15 |
| Minimum Operating Supply Voltage (V) | 3 |
| Typical Operating Supply Voltage (V) | 3.3|5|9|12 |
| Maximum Low Level Output Current (mA) | 30(Min) |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -19.8 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 60@15V|80@10V|190@5V |
| Description |
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