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Bus Transceivers 74LVT16646ADL,512
NXP
74LVT16646ADL,512
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Transceivers
Bus Transceivers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Supplier Unconfirmed |
| Bus Hold | Yes |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 56 |
| Automotive | No |
| Input Level | LVTTL |
| Output Type | 3-State |
| PCB changed | 56 |
| Part Status | Obsolete |
| Logic Family | LVT |
| Output Level | LVTTL |
| Package Width | 7.6(Max) |
| Logic Function | Bus Transceiver/Register |
| Package Height | 2.35(Max) |
| Package Length | 18.55(Max) |
| Triggering Type | Positive-Edge |
| Supplier Package | SSOP |
| Process Technology | BiCMOS |
| Data Flow Direction | Bi-Directional |
| Number of Channels per Chip | 16 |
| Number of Elements per Chip | 2 |
| Maximum Quiescent Current (uA) | 6000 |
| Typical Quiescent Current (uA) | 4900 |
| Number of Direction Control Inputs | 1 Low/High |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Number of Input Enables per Element | 0 |
| Absolute Propagation Delay Time (ns) | 6.6 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 2.7 |
| Number of Output Enables per Element | 1 Low |
| Maximum Low Level Output Current (mA) | 64 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -32 |
| Number of Selection Inputs per Element | 2 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 2.7(Typ)@3.3V |
| Description |
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