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Clock Buffers and Drivers CDCP1803RGERG4
Texas Instruments
CDCP1803RGERG4
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Clock and Timing
Clock Buffers and Drivers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| Type | Clock Divider/Fanout Buffer |
| Fanout | 1:3 |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| Packaging | Tape and Reel |
| Pin Count | 24 |
| Automotive | No |
| Lead Shape | No Lead |
| PCB changed | 24 |
| Part Status | Unconfirmed |
| Package Width | 4.15(Max) |
| Package Height | 0.95(Max) |
| Package Length | 4.15(Max) |
| Supplier Package | VQFN EP |
| Input Logic Level | CML|HSTL|LVCMOS|LVDS|LVTTL|SSTL|VML |
| Output Logic Level | LVPECL |
| Standard Package Name | QFN |
| Number of Outputs per Chip | 3 |
| Maximum Input Frequency (MHz) | 800 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 0.6 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 3 |
| Typical Operating Supply Voltage (V) | 3.3 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 0.6@3V to 3.6V |
| Description |
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