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Clock Buffers and Drivers MC10EP32DR2G
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MC10EP32DR2G
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Clock and Timing
Clock Buffers and Drivers
Specification
| Product Attribute | Attribute Value |
| HTS | 8542330001 |
| PPAP | No |
| Type | Divider Buffer |
| Fanout | 1:1 |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 8 |
| Automotive | No |
| Lead Shape | Gull-wing |
| PCB changed | 8 |
| Part Status | Active |
| Package Width | 4(Max) |
| Package Height | 1.5(Max) |
| Package Length | 5(Max) |
| Supplier Package | SOIC N |
| Input Logic Level | ECL |
| Output Logic Level | ECL |
| Standard Package Name | SOP |
| Number of Outputs per Chip | 1 |
| Maximum Input Frequency (MHz) | >4000(Typ) |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 0.48 |
| Maximum Operating Supply Voltage (V) | -5.5|5.5 |
| Minimum Operating Supply Voltage (V) | -3|3 |
| Typical Operating Supply Voltage (V) | -3.3|-5|3.3|5 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 0.45@3V to 5.5V |
| Description |
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