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Counter Shift Registers 5962-8682701EA
Texas Instruments
5962-8682701EA
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Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| SVHC | Yes |
| EU RoHS | Not Compliant |
| Mounting | Through Hole |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 16 |
| Automotive | No |
| Lead Shape | Through Hole |
| PCB changed | 16 |
| Part Status | Active |
| Logic Family | HC |
| Package Width | 7.62(Max) |
| Direction Type | Uni-Directional |
| Logic Function | Shift Register |
| Operation Mode | Serial/Parallel to Parallel |
| Package Height | 3.56(Max) |
| Package Length | 21.34(Max) |
| Triggering Type | Positive-Edge |
| Number of Stages | 4 |
| Supplier Package | CDIP |
| Process Technology | CMOS |
| Parallel Enable Input | Yes |
| Standard Package Name | DIP |
| Terminal Count Output | No |
| Number of Element Inputs | 6 |
| Number of Element Outputs | 4 |
| Supplier Temperature Grade | Military |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 0 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Absolute Propagation Delay Time (ns) | 225 |
| Maximum Operating Supply Voltage (V) | 6 |
| Minimum Operating Supply Voltage (V) | 2 |
| Typical Operating Supply Voltage (V) | 5 |
| Propagation Delay Test Condition (pF) | 50 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 145@2V|29@4.5V|25@6V |
| Description |
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