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Counter Shift Registers 74HC4017DB,112
Nexperia
74HC4017DB,112
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Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| Type | Decade |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Bulk |
| Pin Count | 16 |
| Automotive | No |
| Reset Type | Asynchronous |
| PCB changed | 16 |
| Part Status | Obsolete |
| Logic Family | HC |
| Package Width | 5.4(Max) |
| Direction Type | Uni-Directional |
| Logic Function | Counter/Divider |
| Operation Mode | UP Counter |
| Package Height | 1.8(Max) |
| Package Length | 6.4(Max) |
| Triggering Type | Positive-Edge/Negative-Edge |
| Number of Stages | 5 |
| Supplier Package | SSOP |
| Process Technology | CMOS |
| Parallel Enable Input | No |
| Terminal Count Output | Yes |
| Number of Element Inputs | 1 |
| Number of Element Outputs | 10 |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 0 |
| Maximum Quiescent Current (mA) | 0.008 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 375 |
| Maximum Operating Supply Voltage (V) | 6 |
| Minimum Operating Supply Voltage (V) | 2 |
| Typical Operating Supply Voltage (V) | 5 |
| Propagation Delay Test Condition (pF) | 50 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 250@2V|43@6V|50@4.5V |
| Description |
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