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Counter Shift Registers SN54LS673J
Texas Instruments
SN54LS673J
--
Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| HTS | 8542330001 |
| PPAP | No |
| EU RoHS | Not Compliant |
| Mounting | Through Hole |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 24 |
| Automotive | No |
| Lead Shape | Through Hole |
| Reset Type | Asynchronous |
| PCB changed | 24 |
| Part Status | Active |
| Logic Family | LS |
| Package Width | 14.85 |
| Direction Type | Uni-Directional |
| Logic Function | Shift Register |
| Operation Mode | Serial to Serial/Parallel |
| Package Height | 4 |
| Package Length | 31.75 |
| Triggering Type | Negative-Edge |
| Number of Stages | 16 |
| Supplier Package | CDIP |
| Process Technology | Bipolar |
| Parallel Enable Input | No |
| Standard Package Name | DIP |
| Terminal Count Output | No |
| Number of Element Inputs | 1 |
| Number of Element Outputs | 17 |
| Supplier Temperature Grade | Military |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 0 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Absolute Propagation Delay Time (ns) | 45 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Propagation Delay Test Condition (pF) | 45 |
| Number of Selection Inputs per Element | 1 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 40@5V |
| Description |
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