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Counter Shift Registers SN74LV165APWG4
Texas Instruments
SN74LV165APWG4
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Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| Packaging | Tube |
| Pin Count | 16 |
| Automotive | No |
| Lead Shape | Gull-wing |
| PCB changed | 16 |
| Part Status | Unconfirmed |
| Logic Family | LV |
| Package Width | 4.5(Max) |
| Direction Type | Uni-Directional |
| Logic Function | Shift Register |
| Operation Mode | Serial/Parallel to Serial |
| Package Height | 1.05(Max) |
| Package Length | 5.1(Max) |
| Triggering Type | Positive-Edge |
| Number of Stages | 8 |
| Supplier Package | TSSOP |
| Tolerant I/Os (V) | 5.5 Inputs |
| Process Technology | CMOS |
| Parallel Enable Input | Yes |
| Standard Package Name | SOP |
| Terminal Count Output | No |
| Number of Element Inputs | 9 |
| Number of Element Outputs | 1 |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 0 |
| Maximum Quiescent Current (mA) | 0.02 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 28 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 2 |
| Typical Operating Supply Voltage (V) | 2.5|3.3|5 |
| Propagation Delay Test Condition (pF) | 50 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 11.9@4.5V to 5.5V|23.3@2.3V to 2.7V|14.9@3V to 3.6V |
| Description |
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