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Counter Shift Registers SN74LV8153NE4
Texas Instruments
SN74LV8153NE4
--
Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Mounting | Through Hole |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 20 |
| Automotive | No |
| Lead Shape | Through Hole |
| Output Type | Open Collector|Push-pull |
| PCB changed | 20 |
| Part Status | Active |
| Logic Family | LV |
| Package Width | 6.6(Max) |
| Direction Type | Uni-Directional |
| Operation Mode | Serial to Parallel |
| Package Height | 5.08(Max) - 0.51(Min) |
| Package Length | 26.92(Max) |
| Triggering Type | Positive-Edge |
| Supplier Package | PDIP |
| Process Technology | CMOS |
| Parallel Enable Input | No |
| Standard Package Name | DIP |
| Terminal Count Output | No |
| Number of Element Inputs | 3 |
| Number of Element Outputs | 8 |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 0 |
| Maximum Quiescent Current (mA) | 20 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 200 |
| Maximum Operating Supply Voltage (V) | 13.5 |
| Minimum Operating Supply Voltage (V) | 3 |
| Typical Operating Supply Voltage (V) | 1.8|2.5|3.3|5|9|12 |
| Propagation Delay Test Condition (pF) | 50 |
| Number of Selection Inputs per Element | 0 |
| Description |
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