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Counter Shift Registers SNJ54AS867FK
Texas Instruments
SNJ54AS867FK
--
Standard and Specialty Logic
Counter Shift Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| Type | Binary |
| EU RoHS | Not Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 28 |
| Automotive | No |
| Lead Shape | No Lead |
| Reset Type | Asynchronous |
| PCB changed | 28 |
| Part Status | Obsolete |
| Preset Type | Synchronous |
| Logic Family | AS |
| Package Width | 11.63(Max) |
| Direction Type | Bi-Directional |
| Logic Function | Counter |
| Operation Mode | Down Counter|UP Counter |
| Package Height | 2.03(Max) |
| Package Length | 11.63(Max) |
| Triggering Type | Positive-Edge |
| Number of Stages | 8 |
| Supplier Package | CLLCC |
| Process Technology | Bipolar |
| Parallel Enable Input | No |
| Standard Package Name | LLCC |
| Terminal Count Output | Yes |
| Number of Element Inputs | 8 |
| Number of Element Outputs | 8 |
| Supplier Temperature Grade | Military |
| Number of Elements per Chip | 1 |
| Number of Count Input Enables | 2 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Absolute Propagation Delay Time (ns) | 31 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 |
| Propagation Delay Test Condition (pF) | 50 |
| Number of Selection Inputs per Element | 2 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 15@4.5V to 5.5V |
| Description |
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