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ESD Suppressors TPD2E001DRLR-P3
Texas Instruments
TPD2E001DRLR-P3
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Circuit Protection
ESD Suppressors
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| Type | Diode Array |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 5 |
| Automotive | No |
| Lead Shape | Flat |
| PCB changed | 5 |
| Configuration | Dual |
| Package Width | 1.3(Max) |
| Direction Type | Uni-Directional |
| Package Height | 0.55(Max) |
| Package Length | 1.7(Max) |
| Supplier Package | SOT-553 |
| Test Current (mA) | 10 |
| Fail Safe Protection | No |
| Standard Package Name | SOT |
| Capacitance Value (pF) | 1.5(Typ) |
| Maximum Working Voltage (V) | 5.5 |
| Number of Elements per Chip | 2 |
| Maximum Clamping Voltage (V) | 105.5 |
| Maximum Leakage Current (uA) | 0.001 |
| Minimum Breakdown Voltage (V) | 11 |
| Maximum Peak Pulse Current (A) | 45 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Description |
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