Product Attribute | Attribute Value |
HTS | 8542.32.00.71 |
Cell Type | NOR |
Boot Block | Yes |
ECC Support | No |
Part Status | Obsolete |
Sector Size | 64Kbyte x 7|32Kbyte x 1|16Kbyte x 1|8Kbyte x 2 |
Timing Type | Asynchronous |
Architecture | Sectored |
Interface Type | Parallel |
Number of Words | 512K/256K |
Programmability | Yes |
Block Organization | Asymmetrical |
Chip Density (bit) | 4M |
Command Compatible | Yes |
OE Access Time (ns) | 30 |
Program Current (mA) | 60 |
Support of Page Mode | No |
Max. Access Time (ns) | 70 |
Location of Boot Block | Top |
Maximum Erase Time (S) | 8/Sector |
Operating Current (mA) | 50 |
Address Bus Width (bit) | 19/18 |
Programming Voltage (V) | 4.5 to 5.5 |
Number of Bits/Word (bit) | 8/16 |
Supplier Temperature Grade | Industrial |
Maximum Programming Time (ms) | 10800/Chip |
Maximum Operating Temperature (°C) | 85 |
Minimum Operating Temperature (°C) | -40 |
Maximum Operating Supply Voltage (V) | 5.5 |
Minimum Operating Supply Voltage (V) | 4.5 |
Typical Operating Supply Voltage (V) | 5 |
Description |