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STM8S003F3P6TRATMEGA48PA-AUAT24C512C-SSHD-TSTM32L031G6U6TPS74801DRCR
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74AUP2G80DC,125
74AUP2G80DC,125
Flip Flops 74AUP2G80DC,125
Nexperia
74AUP2G80DC,125
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Standard and Specialty Logic
Flip Flops
74AUP2G80DC,125.pdf
Specification
Product AttributeAttribute Value
HTS8542330001
PPAPUnknown
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count8
AutomotiveUnknown
PCB changed8
Part StatusActive
Logic FamilyAUP
Package Width2.4(Max)
Logic FunctionD-Type
Package Height0.85(Max)
Package Length2.1(Max)
Triggering TypePositive-Edge
Supplier PackageVSSOP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Number of Element Inputs1
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.0005
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)27.2
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)0.8
Typical Operating Supply Voltage (V)1.8|2.5|3.3
Maximum Low Level Output Current (mA)4
Propagation Delay Test Condition (pF)30
Maximum High Level Output Current (mA)-4
Maximum Propagation Delay Time @ Maximum CL (ns)20.7@1.1V to 1.3V|12.7@1.4V to 1.6V|9.9@1.65V to 1.95V|7.5@2.3V to 2.7V|6.4@3V to 3.6V
Description
Flip Flop D-Type Pos-Edge 2-Element Automotive 8-Pin VSSOP T/R
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