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74HC109PWJ
74HC109PWJ
Flip Flops 74HC109PWJ
Nexperia
74HC109PWJ
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Standard and Specialty Logic
Flip Flops
74HC109PWJ.pdf
Specification
Product AttributeAttribute Value
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count16
Set/ResetSet/Reset
Lead ShapeGull-wing
PCB changed16
Part StatusActive
Logic FamilyHC
Package Width4.5(Max)
Logic FunctionJK# -Type
Package Height0.95(Max)
Package Length5.1(Max)
Triggering TypePositive-Edge
Supplier PackageTSSOP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.004
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)280
Maximum Operating Supply Voltage (V)6
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)5
Maximum Low Level Output Current (mA)5.2
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-5.2
Maximum Propagation Delay Time @ Maximum CL (ns)175@2V|30@6V|35@4.5V
Description
Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin TSSOP T/R
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