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74HC112N,652
74HC112N,652
Flip Flops 74HC112N,652
NXP
74HC112N,652
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Standard and Specialty Logic
Flip Flops
74HC112N,652.pdf
Specification
Product AttributeAttribute Value
HTS8542.31.00.01
PPAPNo
EU RoHSSupplier Unconfirmed
Bus HoldNo
MountingThrough Hole
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingBulk
Pin Count16
Set/ResetSet/Reset
AutomotiveNo
PCB changed16
Part StatusObsolete
Logic FamilyHC
Package Width6.48(Max)
Logic FunctionJK-Type
Package Height3.2(Max)
Package Length19.5(Max)
Triggering TypeNegative-Edge
Supplier PackagePDIP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.004
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)270
Maximum Operating Supply Voltage (V)6
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)5
Maximum Low Level Output Current (mA)7.8
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-7.8
Maximum Propagation Delay Time @ Maximum CL (ns)35@4.5V|30@6V|175@2V
Description
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Bulk
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