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74LCX112SJX
74LCX112SJX
Flip Flops 74LCX112SJX
onsemi
74LCX112SJX
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Standard and Specialty Logic
Flip Flops
74LCX112SJX.pdf
Specification
Product AttributeAttribute Value
PPAPNo
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count16
Set/ResetSet/Reset
AutomotiveNo
Lead ShapeGull-wing
PCB changed16
Part StatusObsolete
Logic FamilyLCX
Package Width5.4(Max)
Logic FunctionJK-Type
Package Height1.9(Max)
Package Length10.3(Max)
Triggering TypeNegative-Edge
Supplier PackageSOP-II
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.01
Maximum Operating Temperature (°C)85
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)9
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)2.5|3.3
Maximum Low Level Output Current (mA)24
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-24
Maximum Propagation Delay Time @ Maximum CL (ns)8@2.7V|7.5@3.3V
Description
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOP-II T/R
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