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74LVX74SJX
74LVX74SJX
Flip Flops 74LVX74SJX
onsemi
74LVX74SJX
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Standard and Specialty Logic
Flip Flops
74LVX74SJX.pdf
Specification
Product AttributeAttribute Value
PPAPNo
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count14
Set/ResetSet/Reset
AutomotiveNo
PCB changed14
Part StatusObsolete
Logic FamilyLVX
Package Width5.4(Max)
Logic FunctionD-Type
Package Height1.9(Max)
Package Length10.3(Max)
Triggering TypePositive-Edge
Supplier PackageSOP W
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Element Inputs1
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.002
Maximum Operating Temperature (°C)85
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)19.1
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)2.5|3.3
Maximum Low Level Output Current (mA)4
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-4
Maximum Propagation Delay Time @ Maximum CL (ns)18.5@2.7V|13.2@3.3V
Description
Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOP W T/R
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