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Flip Flops CD74FCT821AEN
Texas Instruments
CD74FCT821AEN
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Standard and Specialty Logic
Flip Flops
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Not Compliant |
| Bus Hold | No |
| Mounting | Through Hole |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 24 |
| Automotive | No |
| Lead Shape | Through Hole |
| Output Type | 3-State |
| PCB changed | 24 |
| Part Status | Obsolete |
| Logic Family | FCT |
| Package Width | 7.11(Max) |
| Logic Function | D-Type Bus Interface |
| Package Height | 5.08(Max) - 0.51(Min) |
| Package Length | 32.04(Max) |
| Triggering Type | Positive-Edge |
| Supplier Package | PDIP |
| Input Signal Type | Single-Ended |
| Process Technology | CMOS |
| Standard Package Name | DIP |
| Number of Element Inputs | 10 |
| Number of Element Outputs | 10 |
| Number of Channels per Chip | 10 |
| Number of Elements per Chip | 1 |
| Maximum Quiescent Current (mA) | 0.008 |
| Maximum Operating Temperature (°C) | 70 |
| Minimum Operating Temperature (°C) | 0 |
| Absolute Propagation Delay Time (ns) | 12 |
| Maximum Operating Supply Voltage (V) | 5.25 |
| Minimum Operating Supply Voltage (V) | 4.75 |
| Number of Output Enables per Element | 1 |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Low Level Output Current (mA) | 48 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -15 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 7.5(Typ)@4.75V to 5.25V |
| Description |
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