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CD74HC73MTG4
CD74HC73MTG4
Flip Flops CD74HC73MTG4
Texas Instruments
CD74HC73MTG4
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Standard and Specialty Logic
Flip Flops
Specification
Product AttributeAttribute Value
PPAPNo
SVHCYes
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count14
Set/ResetReset
AutomotiveNo
Lead ShapeGull-wing
PCB changed14
Part StatusObsolete
Logic FamilyHC
Package Width4(Max)
Logic FunctionJK-Type
Package Height1.5(Max)
Package Length8.75(Max)
Triggering TypeNegative-Edge
Supplier PackageSOIC
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.004
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-55
Absolute Propagation Delay Time (ns)240
Maximum Operating Supply Voltage (V)6
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)3.3|5|2.5
Maximum Low Level Output Current (mA)5.2
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-5.2
Maximum Propagation Delay Time @ Maximum CL (ns)32@4.5V|28@6V|160@2V
Description
Flip Flop JK-Type Neg-Edge 2-Element 14-Pin SOIC T/R
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