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Flip Flops M54HC273K1
STMicroelectronics
M54HC273K1
--
Standard and Specialty Logic
Flip Flops
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| SVHC | Yes |
| EU RoHS | Not Compliant |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 20 |
| Set/Reset | Master Reset |
| Automotive | No |
| PCB changed | 20 |
| Part Status | NRND |
| Logic Family | HC |
| Package Width | 10.16 |
| Logic Function | D-Type Bus Interface |
| Package Height | 1.61 |
| Package Length | 10.16 |
| Triggering Type | Positive-Edge |
| Supplier Package | FPC |
| Input Signal Type | Single-Ended |
| Process Technology | CMOS |
| Standard Package Name | CFPAK |
| SVHC Exceeds Threshold | Yes |
| Number of Element Inputs | 8 |
| Number of Element Outputs | 8 |
| Supplier Temperature Grade | Military |
| Number of Channels per Chip | 8 |
| Number of Elements per Chip | 1 |
| Maximum Quiescent Current (mA) | 0.004 |
| Maximum Operating Temperature (°C) | 125 |
| Minimum Operating Temperature (°C) | -55 |
| Absolute Propagation Delay Time (ns) | 240 |
| Maximum Operating Supply Voltage (V) | 6 |
| Minimum Operating Supply Voltage (V) | 2 |
| Typical Operating Supply Voltage (V) | 2.5|3.3|5 |
| Maximum Low Level Output Current (mA) | 5.2 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -5.2 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 145@2V|29@4.5V|25@6V |
| Description |
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