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MC100EP35DG
MC100EP35DG
Flip Flops MC100EP35DG
onsemi
MC100EP35DG
--
Standard and Specialty Logic
Flip Flops
MC100EP35DG.pdf
Specification
Product AttributeAttribute Value
HTS8542330001
PPAPNo
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTube
Pin Count8
Set/ResetReset
AutomotiveNo
Lead ShapeGull-wing
PCB changed8
Part StatusObsolete
Logic FamilyECL
Package Width4(Max)
Logic FunctionJK-Master-Slave Type
Package Height1.5(Max)
Package Length5(Max)
Triggering TypePositive-Edge
Supplier PackageSOIC N
Input Signal TypeSingle-Ended
Process TechnologyECL
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip1
Number of Elements per Chip1
Maximum Operating Temperature (°C)85
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)0.575
Maximum Operating Supply Voltage (V)-5.5|5.5
Minimum Operating Supply Voltage (V)-3|3
Typical Operating Supply Voltage (V)-3.3|-5|3.3|5
Maximum Low Level Output Current (mA)50
Maximum High Level Output Current (mA)-50
Maximum Propagation Delay Time @ Maximum CL (ns)0.49@3V to 5.5V
Description
Flip Flop JK-Master-Slave Type Pos-Edge 1-Element 8-Pin SOIC N Tube
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