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Flip Flops MC100LVEL29DWG
onsemi
MC100LVEL29DWG
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Standard and Specialty Logic
Flip Flops
Specification
| Product Attribute | Attribute Value |
| HTS | 8542.39.00.01 |
| PPAP | No |
| EU RoHS | Compliant |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Inverting/Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tube |
| Pin Count | 20 |
| Set/Reset | Set/Reset |
| Automotive | No |
| Lead Shape | Gull-wing |
| PCB changed | 20 |
| Part Status | Active |
| Logic Family | ECL |
| Package Width | 7.6(Max) |
| Logic Function | D-Master-Slave Type |
| Package Height | 2.4(Max) |
| Package Length | 12.95(Max) |
| Triggering Type | Positive-Edge/Negative-Edge |
| Supplier Package | SOIC W |
| Input Signal Type | Differential |
| Process Technology | ECL |
| Standard Package Name | SOP |
| Number of Element Inputs | 1 |
| Number of Element Outputs | 1 |
| Number of Channels per Chip | 2 |
| Number of Elements per Chip | 2 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 0.74 |
| Maximum Operating Supply Voltage (V) | 3.8|-3.8 |
| Minimum Operating Supply Voltage (V) | 3|-3 |
| Typical Operating Supply Voltage (V) | 3.3|-3.3 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 0.7@3.3V |
| Description |
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