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SN74LS112ADR
SN74LS112ADR
Flip Flops SN74LS112ADR
Texas Instruments
SN74LS112ADR
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Standard and Specialty Logic
Flip Flops
Specification
Product AttributeAttribute Value
HTS8542.39.00.01
PPAPNo
SVHCYes
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count16
Set/ResetSet/Reset
AutomotiveNo
Lead ShapeGull-wing
PCB changed16
Part StatusActive
Logic FamilyLS
Package Width4(Max)
Logic FunctionJK-Type
Package Height1.5(Max)
Package Length10(Max)
Triggering TypeNegative-Edge
Supplier PackageSOIC
Input Signal TypeSingle-Ended
Process TechnologyBipolar
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Operating Temperature (°C)70
Minimum Operating Temperature (°C)0
Absolute Propagation Delay Time (ns)20
Maximum Operating Supply Voltage (V)5.25
Minimum Operating Supply Voltage (V)4.75
Typical Operating Supply Voltage (V)5
Maximum Low Level Output Current (mA)8
Propagation Delay Test Condition (pF)15
Maximum High Level Output Current (mA)-0.4
Maximum Propagation Delay Time @ Maximum CL (ns)20@5V
Description
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T/R
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