Product Attribute | Attribute Value |
PPAP | No |
Type | D-Type |
EU RoHS | Not Compliant |
Bus Hold | Yes |
Mounting | Surface Mount |
Polarity | Non-Inverting |
ECCN (US) | 3A001.a.2.c |
Packaging | Tube |
Pin Count | 48 |
Set/Reset | No |
Automotive | No |
Latch Mode | Transparent |
Lead Shape | Flat |
Output Type | 3-State |
PCB changed | 48 |
Part Status | Obsolete |
Logic Family | LVT |
Package Width | 9.91(Max) |
Package Height | 3.05(Max) |
Package Length | 16.26(Max) |
Supplier Package | CFPAK |
Tolerant I/Os (V) | 5 |
Process Technology | BiCMOS |
Standard Package Name | FPAK |
Number of Inputs per Chip | 16 |
Number of Outputs per Chip | 16 |
Supplier Temperature Grade | Military |
Number of Channels per Chip | 16 |
Number of Elements per Chip | 2 |
Maximum Quiescent Current (uA) | 5000 |
Maximum Operating Temperature (°C) | 125 |
Minimum Operating Temperature (°C) | -55 |
Number of Input Enables per Element | 1 |
Absolute Propagation Delay Time (ns) | 7.4 |
Maximum Operating Supply Voltage (V) | 3.6 |
Minimum Operating Supply Voltage (V) | 2.7 |
Number of Output Enables per Element | 1 |
Typical Operating Supply Voltage (V) | 3.3 |
Maximum Low Level Output Current (mA) | 12 |
Propagation Delay Test Condition (pF) | 50 |
Maximum High Level Output Current (mA) | -12 |
Number of Selection Inputs per Element | 0 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 5@3.3V|5.7@2.7V |
Description |