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74ALVC573D,118
74ALVC573D,118
Latches 74ALVC573D,118
Nexperia
74ALVC573D,118
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Standard and Specialty Logic
Latches
Specification
Product AttributeAttribute Value
PPAPNo
TypeD-Type
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityNon-Inverting
ECCN (US)EAR99
PackagingTape and Reel
Pin Count20
Set/ResetNo
AutomotiveNo
Latch ModeTransparent
Output Type3-State
PCB changed20
Part StatusActive
Logic FamilyALVC
Package Width7.6(Max)
Package Height2.45(Max)
Package Length13(Max)
Supplier PackageSO
Tolerant I/Os (V)3.6
Process TechnologyCMOS
Number of Inputs per Chip8
Number of Outputs per Chip8
Number of Channels per Chip8
Number of Elements per Chip1
Maximum Quiescent Current (uA)10
Typical Quiescent Current (uA)0.2
Maximum Operating Temperature (°C)85
Minimum Operating Temperature (°C)-40
Number of Input Enables per Element1
Absolute Propagation Delay Time (ns)7
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)1.65
Number of Output Enables per Element1
Typical Operating Supply Voltage (V)1.8|2.5|3.3
Maximum Low Level Output Current (mA)24
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-24
Number of Selection Inputs per Element0
Maximum Propagation Delay Time @ Maximum CL (ns)2.3(Typ)@2.7V|2.2(Typ)@3V to 3.6V
Description
Latch Transparent 3-ST 8-CH D-Type 20-Pin SO T/R
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