Product Attribute | Attribute Value |
PPAP | No |
SVHC | Yes |
Type | D-Type |
EU RoHS | Not Compliant |
Bus Hold | No |
Mounting | Surface Mount |
Polarity | Non-Inverting |
ECCN (US) | 3A001.a.2.c |
Pin Count | 20 |
Set/Reset | No |
Automotive | No |
Latch Mode | Transparent |
Output Type | 3-State |
PCB changed | 20 |
Part Status | Unconfirmed |
Logic Family | HC |
Package Width | 10.16 |
Package Height | 2.11 |
Package Length | 10.16 |
Supplier Package | FPC |
Process Technology | CMOS |
Standard Package Name | CFPAK |
SVHC Exceeds Threshold | Yes |
Number of Inputs per Chip | 8 |
Number of Outputs per Chip | 8 |
Number of Channels per Chip | 8 |
Number of Elements per Chip | 1 |
Maximum Quiescent Current (uA) | 4 |
Maximum Operating Temperature (°C) | 125 |
Minimum Operating Temperature (°C) | -55 |
Number of Input Enables per Element | 1 |
Absolute Propagation Delay Time (ns) | 265 |
Maximum Operating Supply Voltage (V) | 6 |
Minimum Operating Supply Voltage (V) | 2 |
Number of Output Enables per Element | 1 |
Typical Operating Supply Voltage (V) | 3.3|2.5|5 |
Maximum Low Level Output Current (mA) | 7.8 |
Propagation Delay Test Condition (pF) | 150 |
Maximum High Level Output Current (mA) | -7.8 |
Number of Selection Inputs per Element | 0 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 30@6V|35@4.5V|175@2V |
Description |