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Latches NLV74LVX573DTR2G
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NLV74LVX573DTR2G
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Standard and Specialty Logic
Latches
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Pin Count | 20 |
| Automotive | No |
| Lead Shape | Gull-wing |
| Output Type | 3-State |
| PCB changed | 20 |
| Part Status | Active |
| Logic Family | LVX |
| Package Width | 4.5(Max) |
| Package Height | 1.05(Max) |
| Package Length | 6.6(Max) |
| Supplier Package | TSSOP W |
| Process Technology | CMOS |
| Standard Package Name | SOP |
| Supplier Temperature Grade | Industrial |
| Number of Elements per Chip | 1 |
| Maximum Quiescent Current (uA) | 4 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Absolute Propagation Delay Time (ns) | 22 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 2 |
| Number of Output Enables per Element | 1 |
| Typical Operating Supply Voltage (V) | 3.3|2.5 |
| Maximum Low Level Output Current (mA) | 4 |
| Propagation Delay Test Condition (pF) | 50 |
| Maximum High Level Output Current (mA) | -4 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 12.8@3.3V|18@2.7V |
| Description |
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