Product Attribute | Attribute Value |
HTS | 8542330001 |
PPAP | No |
SVHC | Yes |
Type | D-Type |
EU RoHS | Not Compliant |
Bus Hold | No |
Mounting | Surface Mount |
Polarity | Non-Inverting |
ECCN (US) | EAR99 |
Packaging | Tube |
Pin Count | 48 |
Set/Reset | No |
Automotive | No |
Latch Mode | Transparent |
Lead Shape | Flat |
Output Type | 3-State |
PCB changed | 48 |
Part Status | Active |
Logic Family | ACT |
Package Width | 9.91(Max) |
Package Height | 3.05(Max) |
Package Length | 16.26(Max) |
Supplier Package | CFPAK |
Process Technology | CMOS |
Standard Package Name | FPAK |
SVHC Exceeds Threshold | Yes |
Number of Inputs per Chip | 16 |
Number of Outputs per Chip | 16 |
Supplier Temperature Grade | Military |
Number of Channels per Chip | 16 |
Number of Elements per Chip | 2 |
Maximum Quiescent Current (uA) | 8 |
Maximum Operating Temperature (°C) | 125 |
Minimum Operating Temperature (°C) | -55 |
Number of Input Enables per Element | 1 |
Absolute Propagation Delay Time (ns) | 15.1 |
Maximum Operating Supply Voltage (V) | 5.5 |
Minimum Operating Supply Voltage (V) | 4.5 |
Number of Output Enables per Element | 1 |
Typical Operating Supply Voltage (V) | 5 |
Maximum Low Level Output Current (mA) | 24 |
Propagation Delay Test Condition (pF) | 50 |
Maximum High Level Output Current (mA) | -24 |
Number of Selection Inputs per Element | 0 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 9.7@4.5V to 5.5V |
Description |