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PHY DP83848JSQ
Texas Instruments
DP83848JSQ
--
Communication
PHY
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Not Compliant |
| Mounting | Surface Mount |
| ECCN (US) | 5A991 |
| Packaging | Tape and Reel |
| Pin Count | 40 |
| Automotive | No |
| Lead Shape | No Lead |
| PCB changed | 40 |
| Part Status | Unconfirmed |
| JTAG Support | No |
| Package Width | 6.15(Max) |
| Integrated CDR | No |
| Package Height | 0.75(Max) |
| Package Length | 6.15(Max) |
| Supplier Package | WQFN EP |
| Maximum Data Rate | 100Mbps |
| Power Supply Type | Analog |
| Standard Supported | IEEE 802.3u |
| Standard Package Name | QFN |
| PHY Line Side Interface | No |
| Typical Data Rate (Mbps) | 10/100 |
| Supplier Temperature Grade | Commercial |
| Maximum Supply Current (mA) | 92(Typ) |
| Number of Channels per Chip | 1 |
| Maximum Power Dissipation (mW) | 264 |
| Maximum Operating Temperature (°C) | 70 |
| Minimum Operating Temperature (°C) | 0 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 3 |
| Typical Operating Supply Voltage (V) | 3.3 |
| Description |
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