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Registers 74SSTUB32865AZJBR
Texas Instruments
74SSTUB32865AZJBR
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Standard and Specialty Logic
Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| EU RoHS | Compliant |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 160 |
| Automotive | No |
| Lead Shape | Ball |
| Reset Type | Asynchronous |
| PCB changed | 160 |
| Part Status | Obsolete |
| Logic Family | SSTU |
| Package Width | 9 |
| Logic Function | Registered Buffer with Parity Checker |
| Package Height | 0.77 |
| Package Length | 13 |
| Triggering Type | Positive-Edge/Negative-Edge |
| Supplier Package | NFBGA |
| Input Signal Type | Single-Ended |
| Output Signal Type | Single-Ended |
| Process Technology | CMOS |
| Standard Package Name | BGA |
| Maximum Frequency (MHz) | 410(Min) |
| Number of Element Inputs | 28 |
| Number of Element Outputs | 56 |
| Supplier Temperature Grade | Industrial |
| Number of Channels per Chip | 28 |
| Number of Elements per Chip | 1 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Number of Input Enables per Element | 0 |
| Absolute Propagation Delay Time (ns) | 3 |
| Maximum Operating Supply Voltage (V) | 1.9 |
| Minimum Operating Supply Voltage (V) | 1.7 |
| Number of Output Enables per Element | 0 |
| Typical Operating Supply Voltage (V) | 1.8 |
| Maximum Low Level Output Current (mA) | 12 |
| Maximum High Level Output Current (mA) | -12 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 1.1@1.85V |
| Description |
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