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Registers SN74SSTV16857DGGR
Texas Instruments
SN74SSTV16857DGGR
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Standard and Specialty Logic
Registers
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| SVHC | Yes |
| EU RoHS | Compliant |
| Bus Hold | No |
| Mounting | Surface Mount |
| Polarity | Non-Inverting |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 48 |
| Automotive | No |
| Lead Shape | Gull-wing |
| Reset Type | Asynchronous |
| PCB changed | 48 |
| Part Status | Unconfirmed |
| Logic Family | SSTV |
| Package Width | 6.2(Max) |
| Logic Function | Registered Buffer |
| Package Height | 1.05(Max) |
| Package Length | 12.6(Max) |
| Triggering Type | Positive-Edge/Negative-Edge |
| Supplier Package | TSSOP |
| Input Signal Type | Single-Ended |
| Output Signal Type | Single-Ended |
| Process Technology | CMOS |
| Standard Package Name | SOP |
| Maximum Frequency (MHz) | 200(Min) |
| Number of Element Inputs | 14 |
| Number of Element Outputs | 14 |
| Number of Channels per Chip | 14 |
| Number of Elements per Chip | 1 |
| Maximum Operating Temperature (°C) | 70 |
| Minimum Operating Temperature (°C) | 0 |
| Number of Input Enables per Element | 0 |
| Absolute Propagation Delay Time (ns) | 5 |
| Maximum Operating Supply Voltage (V) | 2.7 |
| Minimum Operating Supply Voltage (V) | 2.3 |
| Number of Output Enables per Element | 0 |
| Typical Operating Supply Voltage (V) | 2.5 |
| Maximum Low Level Output Current (mA) | 20 |
| Propagation Delay Test Condition (pF) | 30 |
| Maximum High Level Output Current (mA) | -20 |
| Number of Selection Inputs per Element | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 2.8@2.5V |
| Description |
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