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SN74LVC112APWRE4
SN74LVC112APWRE4
Flip Flops SN74LVC112APWRE4
Texas Instruments
SN74LVC112APWRE4
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Standard and Specialty Logic
Flip Flops
Specification
Product AttributeAttribute Value
HTS8542.39.00.01
PPAPNo
SVHCYes
EU RoHSCompliant
Bus HoldNo
MountingSurface Mount
PolarityInverting/Non-Inverting
ECCN (US)EAR99
Pin Count16
Set/ResetSet/Reset
AutomotiveNo
Lead ShapeGull-wing
Output TypePush-Pull
PCB changed16
Part StatusUnconfirmed
Logic FamilyLVC
Package Width4.5(Max)
Logic FunctionJK-Type
Package Height1.05(Max)
Package Length5.1(Max)
Triggering TypeNegative-Edge
Supplier PackageTSSOP
Input Signal TypeSingle-Ended
Process TechnologyCMOS
Standard Package NameSOP
Number of Element Inputs2
Number of Element Outputs1
Supplier Temperature GradeCommercial
Number of Channels per Chip2
Number of Elements per Chip2
Maximum Quiescent Current (mA)0.01
Maximum Operating Temperature (°C)125
Minimum Operating Temperature (°C)-40
Absolute Propagation Delay Time (ns)7.6
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)1.65
Typical Operating Supply Voltage (V)1.8|2.5|3.3
Maximum Low Level Output Current (mA)24
Propagation Delay Test Condition (pF)50
Maximum High Level Output Current (mA)-24
Maximum Propagation Delay Time @ Maximum CL (ns)7.6@2.7V|6.4@3.3V
Description
Flip Flop JK-Type Neg-Edge Push-Pull 2-Element 16-Pin TSSOP T/R
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