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MOSFETs SIR836DP-T1-GE3
Vishay
SIR836DP-T1-GE3
--
Diodes, Transistors and Thyristors
MOSFETs
Specification
| Product Attribute | Attribute Value |
| PPAP | No |
| SVHC | Yes |
| EU RoHS | Compliant with Exemption |
| Mounting | Surface Mount |
| ECCN (US) | EAR99 |
| Packaging | Tape and Reel |
| Pin Count | 8 |
| Automotive | No |
| Lead Shape | No Lead |
| PCB changed | 8 |
| Part Status | Active |
| Channel Mode | Enhancement |
| Channel Type | N |
| Configuration | Single Quad Drain Triple Source |
| Package Width | 5.89 |
| Package Height | 1.07(Max) |
| Package Length | 4.9 |
| Product Category | Power MOSFET |
| Supplier Package | PowerPAK SO EP |
| Maximum IDSS (uA) | 1 |
| Process Technology | TrenchFET |
| SVHC Exceeds Threshold | Yes |
| Typical Fall Time (ns) | 11 |
| Typical Rise Time (ns) | 19 |
| Number of Elements per Chip | 1 |
| Maximum Gate Resistance (Ohm) | 4.8 |
| Minimum Gate Resistance (Ohm) | 0.5 |
| Maximum Power Dissipation (mW) | 3900 |
| Typical Gate Charge @ 10V (nC) | 11.8 |
| Typical Gate Charge @ Vgs (nC) | 11.8@10V|5.8@4.5V |
| Maximum Gate Source Voltage (V) | ±20 |
| Typical Output Capacitance (pF) | 100 |
| Typical Turn-On Delay Time (ns) | 14 |
| Maximum Drain Source Voltage (V) | 40 |
| Typical Gate Plateau Voltage (V) | 2.5 |
| Typical Turn-Off Delay Time (ns) | 17 |
| Maximum Diode Forward Voltage (V) | 1.1 |
| Typical Diode Forward Voltage (V) | 0.77 |
| Typical Gate to Drain Charge (nC) | 2.1 |
| Maximum Gate Threshold Voltage (V) | 2.5 |
| Minimum Gate Threshold Voltage (V) | 1.2 |
| Typical Gate to Source Charge (nC) | 1.6 |
| Typical Reverse Recovery Time (ns) | 15 |
| Maximum Operating Temperature (°C) | 150 |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Continuous Drain Current (A) | 10.6 |
| Operating Junction Temperature (°C) | -55 to 150 |
| Typical Input Capacitance @ Vds (pF) | 600@20V |
| Typical Reverse Recovery Charge (nC) | 7.5 |
| Maximum Drain Source Resistance (mOhm) | 19@10V |
| Maximum Gate Source Leakage Current (nA) | 100 |
| Maximum Positive Gate Source Voltage (V) | 20 |
| Maximum Pulsed Drain Current @ TC=25°C (A) | 50 |
| Maximum Power Dissipation on PCB @ TC=25°C (W) | 3.9 |
| Typical Reverse Transfer Capacitance @ Vds (pF) | 50@20V |
| Maximum Continuous Drain Current on PCB @ TC=25°C (A) | 10.6 |
| Maximum Junction Ambient Thermal Resistance on PCB (°C/W) | 70 |
| Description |
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